Narrow bus encoding for low-power DSP systems

نویسندگان

  • Youngsoo Shin
  • Kiyoung Choi
  • Young-Hoon Chang
چکیده

High levels of integration in integrated circuits often lead to the problem of running out of pins. Narrow data buses can be used to alleviate this problem provided that the degraded performance due to wait cycles can be tolerated. We address bus coding methods for low-power core-based systems incorporating narrow buses. We show that transition signaling combined with bus-invert coding, which we call BITS coding, is particularly suitable for the data patterns of typical DSP applications on narrow data buses. The application of BITS coding to real circuit design is limited by the extra bus line introduced, which changes the pinout of the chip. We propose a new coding method, which does not require the extra bus line but retains the advantage of BITS.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Design and Implementation of Digital Demodulator for Frequency Modulated CW Radar (RESEARCH NOTE)

Radar Signal Processing has been an interesting area of research for realization of programmable digital signal processor using VLSI design techniques. Digital Signal Processing (DSP) algorithms have been an integral design methodology for implementation of high speed application specific real-time systems especially for high resolution radar. CORDIC algorithm, in recent times, is turned out to...

متن کامل

A Novel Multiply-Accumulator Unit Bus Encoding Architecture for Image Processing Applications

In the CMOS circuit power dissipation is a major concern for VLSI functional units. With shrinking feature size, increased frequency and power dissipation on the data bus have become the most important factor compared to other parts of the functional units. One of the most important functional units in any processor is the Multiply-Accumulator unit (MAC). The current work focuses on the develop...

متن کامل

LOW-POWER SYSTEMS-ON-CHIP Bus encoding architecture for low-power implementation of an AMBA-based SoC platform

Advanced microcontroller bus architecture (AMBA) is rapidly becoming the de facto standard for new system-on-chip (SoC) designs. The bus protocol is complex, making any peripherals that can interface to it valuable intellectual property (IP). This paper presents a lowpower bus encoding architecture which is able to deal with the complex advanced highperformance bus (AHB) protocol within AMBA, w...

متن کامل

Resource-Constrained Low Power Bus Encoding in Embedded System Design Resource-Constrained Low Power Bus Encoding in Embedded System Design

Minimizing power consumption of a bus is one of the most important design objectives in embedded system-on-chip (SoC) design and ultra deep-submicron (UDSM) technology. In this thesis, we address the problem of design space exploration of low-energy software bus encoding in embedded SoC design. Traditionally, finding a bus encoding that leads to a minimum energy consumption of a bus has been an...

متن کامل

Design issues for bus switch systems in deep sub-micro metric CMOS technologies

The high data-rate communication channels represent one of the most power-aware design problem, trying to decrease energy consumption maintain acceptable some other performance constraints. In this context, the bus-switch mechanism represents a novel and efficient bus encoding approach for low-power data off-chip buses. It is based on tentatively encoding, clustering, reordering and encoding a ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:
  • IEEE Trans. VLSI Syst.

دوره 9  شماره 

صفحات  -

تاریخ انتشار 2001